Re: [PATCH 2/2] arm64: dts: qcom: Add cpu scaling clock node

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On 1/20/2025 2:16 PM, Dmitry Baryshkov wrote:
This doesn't follow the bindings, does it?
I will add and re-use the closest target compatible.

+		reg = <0 0x18323000 0 0x1400>,
+		      <0 0x18325800 0 0x1400>;
+		reg-names = "freq-domain0", "freq-domain1";
+
+		clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+		clock-names = "xo", "alternate";
Are the DCVSH interrupts?

This target does not have DCVSH interrupts directly connected to the
CPUFREQ-HW.
So, does it require a separate LMH driver, like the one used for sdm845?

I will check how it is handled on QCS615 as it is closer to SC7180 and I didn't see any LMH handling there as well.

--
Thanks & Regards,
Taniya Das.





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