Add support for reading the adc channels of pm8775 on SA8775P platforms.
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 90 +++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
index 1369c3d43f86..bd4f5f51e094 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
@@ -1,8 +1,10 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023, Linaro Limited
+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
+#include <dt-bindings/iio/adc/qcom,spmi-adc5-gen3-pm8775.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/spmi/spmi.h>
@@ -105,6 +107,28 @@ pmm8654au_0: pmic@0 {
#address-cells = <1>;
#size-cells = <0>;
+ pmm8654au_0_adc: vadc@8000 {
+ compatible = "qcom,spmi-adc5-gen3";
+ reg = <0x8000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts-extended = <&spmi_bus 0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "adc-sdam0";
+ #io-channel-cells = <1>;
+
+ pmm8654au_0_die_temp {
+ reg = <PM8775_ADC5_GEN3_DIE_TEMP(0)>;
+ label = "pmm8654au_0_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmm8654au_0_vph_pwr {
+ reg = <PM8775_ADC5_GEN3_VPH_PWR(0)>;
+ label = "pmm8654au_0_vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
pmm8654au_0_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
@@ -162,6 +186,28 @@ pmm8654au_1: pmic@2 {
#address-cells = <1>;
#size-cells = <0>;
+ pmm8654au_1_adc: vadc@8000 {
+ compatible = "qcom,spmi-adc5-gen3";
+ reg = <0x8000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts-extended = <&spmi_bus 0x2 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "adc-sdam0";
+ #io-channel-cells = <1>;
+
+ pmm8654au_1_die_temp {
+ reg = <PM8775_ADC5_GEN3_DIE_TEMP(2)>;
+ label = "pmm8654au_1_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmm8654au_1_vph_pwr {
+ reg = <PM8775_ADC5_GEN3_VPH_PWR(2)>;
+ label = "pmm8654au_1_vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
pmm8654au_1_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
@@ -186,6 +232,28 @@ pmm8654au_2: pmic@4 {
#address-cells = <1>;
#size-cells = <0>;
+ pmm8654au_2_adc: vadc@8000 {
+ compatible = "qcom,spmi-adc5-gen3";
+ reg = <0x8000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts-extended = <&spmi_bus 0x4 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "adc-sdam0";
+ #io-channel-cells = <1>;
+
+ pmm8654au_2_die_temp {
+ reg = <PM8775_ADC5_GEN3_DIE_TEMP(4)>;
+ label = "pmm8654au_2_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmm8654au_2_vph_pwr {
+ reg = <PM8775_ADC5_GEN3_VPH_PWR(4)>;
+ label = "pmm8654au_2_vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
pmm8654au_2_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
@@ -210,6 +278,28 @@ pmm8654au_3: pmic@6 {
#address-cells = <1>;
#size-cells = <0>;
+ pmm8654au_3_adc: vadc@8000 {
+ compatible = "qcom,spmi-adc5-gen3";
+ reg = <0x8000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts-extended = <&spmi_bus 0x6 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "adc-sdam0";
+ #io-channel-cells = <1>;
+
+ pmm8654au_3_die_temp {
+ reg = <PM8775_ADC5_GEN3_DIE_TEMP(6)>;
+ label = "pmm8654au_3_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmm8654au_3_vph_pwr {
+ reg = <PM8775_ADC5_GEN3_VPH_PWR(6)>;
+ label = "pmm8654au_3_vph_pwr";
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
pmm8654au_3_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
--
2.25.1
