On 22/06/2024 13:01, Konrad Dybcio wrote:
On 21.06.2024 4:01 PM, Neil Armstrong wrote:Since those clocks are using rcg2_shared_ops to park on TCXO instead of disable, no need to have TCXO in the frequency table. Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver") Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> ---I don't think that's correct.. some hardware can still run with the core clock @ 19.2 / 38.4 MHz
I agree, but the same table on other dispcc drivers don't have this TCXO entries, and the OPP table in DT neither... I'll drop this, but at some point we should align ourselves. Neil
Konrad
