On 2/26/2016 11:14 PM, Stephen Boyd wrote:
On 02/26, Archit Taneja wrote:diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index bfbb28f..2c033f2 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c @@ -655,8 +654,13 @@ static int clk_rcg_pixel_set_rate(struct clk_hw *hw, unsigned long rate, (parent_rate > (request + delta))) continue; - f.m = frac->num; - f.n = frac->den; + /* try to use only the pre-divider if we can */ + if (frac->num == 1) { + f.pre_div = frac->den;What if the pre divider can't support the frac->den value? Maybe we should just force the pre divider to be in bypass so that we can use the m/n all the time.
Yeah, for some strange reason it seems like having a pre-divider as 3 itself doesn't seem to work. As you suggested, I'll force the pre divider to 1 and use m/n all the time. Archit
+ } else { + f.m = frac->num; + f.n = frac->den; + } return __clk_rcg_set_rate(rcg, &f); }
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