On 10/11/23 12:44, Mrinmay Sarkar wrote:
On 9/21/2023 3:18 PM, Manivannan Sadhasivam wrote:
On Wed, Sep 20, 2023 at 07:25:12PM +0530, Mrinmay Sarkar wrote:
Add ep pcie dtsi node for pcie0 controller found on sa8775p platform.
It would be good to add more info in the commit message, like PCIe
Gen, lane
info, IP revision etc...
Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx>
---
[...]
+ max-link-speed = <3>;
Gen 3?
there is some stability issue with gen4 so going with gen3 as of now.
Will update once issue is resolved.
That's something that should have definitely been mentioned in the
commit message..
Please try resolving this first, if it ends up requiring bindings
changes (missing clocks or whatever), it will be a pain.
Konrad
