Re: [PATCH v2 3/4] drm/msm/dpu: Add DPU_INTF_DATA_COMPRESS feature flag

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On 09/05/2023 03:28, Abhinav Kumar wrote:


On 5/8/2023 4:08 PM, Dmitry Baryshkov wrote:
On 09/05/2023 00:46, Jessica Zhang wrote:


On 5/7/2023 9:00 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:50, Jessica Zhang wrote:
Add DATA_COMPRESS feature flag to DPU INTF block.

In DPU 7.x and later, DSC/DCE enablement registers have been moved from
PINGPONG to INTF.

As core_rev (and related macros) was removed from the dpu_kms struct, the most straightforward way to indicate the presence of this register would be
to have a feature flag.

Irrelevant.  Even though core_rev was still in mainline until recently,
we always hardcoded the features in the catalog and only used core_rev
to select a dpu_mdss_cfg catalog entry.  There is no "if version >= X
then enable feature Y" logic, this manually-enabled feature flag is the
only, correct way to do it.

Hi Marijn,

Understood. FWIW, if we do find more register bit-level differences between HW versions in the future, it might make more sense to keep the HW catalog small and bring core_rev back, rather than keep adding these kinds of small differences to caps.

Let's see how it goes. Abhinav suggested that there might be feature differences inside the DPU generations (and even inside the single DPU major/minor combo). So I'm not sure what core_rev will bring us.


It allows us to have if MDSS_REV() checks which are convenient for some calculations / bit programming which we dont want to expose in the catalog as they cannot be classified as a hw cap as such or atleast we dont want them to be classified as such.

Let's land the platforms which are ready (or if there is anything close to be submitted). I'll post the next proposal for the catalog cleanups close to -rc4, when the dust settles then we can have one or two weaks for the discussion and polishing.

I'd like to consider:
- inlining foo_BLK macros, if that makes adding new features easier
- reformat of clk_ctrls
- maybe reintroduction of per-generation feature masks instead of keeping them named after the random SoC - maybe a rework of mdss_irqs / INTFn_INTR. We already have this info in hw catalog.

Comments are appreciated.


I would say, lets wait for DSC to settle. Atleast the parts already on the list. Continuous rebase of features already on the list is becoming time consuming because of overlapping catalog reworks.

As I wrote, -rc4. Until that time, I'd expect DSC to be settled and accepted.

--
With best wishes
Dmitry




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