On Wed, Apr 12, 2023 at 04:53:05PM +0200, Konrad Dybcio wrote:
> BI_TCXO_AO was previously shoved in under the name of its non-AO
> sibling in parent_map_2. Resolve it.
>
> Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> ---
> drivers/clk/qcom/dispcc-qcm2290.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
> index cbb5f1ec6a54..0f516c72e624 100644
> --- a/drivers/clk/qcom/dispcc-qcm2290.c
> +++ b/drivers/clk/qcom/dispcc-qcm2290.c
> @@ -24,6 +24,7 @@
>
> enum {
> P_BI_TCXO,
> + P_BI_TCXO_AO,
> P_DISP_CC_PLL0_OUT_MAIN,
> P_DSI0_PHY_PLL_OUT_BYTECLK,
> P_DSI0_PHY_PLL_OUT_DSICLK,
> @@ -83,7 +84,7 @@ static const struct clk_parent_data disp_cc_parent_data_1[] = {
> };
>
> static const struct parent_map disp_cc_parent_map_2[] = {
> - { P_BI_TCXO, 0 },
> + { P_BI_TCXO_AO, 0 },
I think the commit message fails to explain why the parent clock for the
AHB clocks should be active-only. Are you sure, can you please
elaborate?
Thanks,
Bjorn
> { P_GPLL0_OUT_MAIN, 4 },
> };
>
> @@ -154,7 +155,7 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
> };
>
> static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = {
> - F(19200000, P_BI_TCXO, 1, 0, 0),
> + F(19200000, P_BI_TCXO_AO, 1, 0, 0),
> F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0),
> F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0),
> { }
>
> --
> 2.40.0
>
