On Wed, Apr 12, 2023 at 04:53:07PM +0200, Konrad Dybcio wrote:
> GPLL0_OUT_DIV was previously shoved in under the name of its undivided
> sibling in parent_map_2. Resolve it.
>
I'm afraid I don't understand what you're saying here, can you please
rework it?
Thanks,
Bjorn
> Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> ---
> drivers/clk/qcom/dispcc-qcm2290.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
> index ee62aca4e5bb..44dd5cfcc150 100644
> --- a/drivers/clk/qcom/dispcc-qcm2290.c
> +++ b/drivers/clk/qcom/dispcc-qcm2290.c
> @@ -28,6 +28,7 @@ enum {
> P_DISP_CC_PLL0_OUT_MAIN,
> P_DSI0_PHY_PLL_OUT_BYTECLK,
> P_DSI0_PHY_PLL_OUT_DSICLK,
> + P_GPLL0_OUT_DIV,
> P_GPLL0_OUT_MAIN,
> P_SLEEP_CLK,
> };
> @@ -84,7 +85,7 @@ static const struct clk_parent_data disp_cc_parent_data_1[] = {
>
> static const struct parent_map disp_cc_parent_map_2[] = {
> { P_BI_TCXO_AO, 0 },
> - { P_GPLL0_OUT_MAIN, 4 },
> + { P_GPLL0_OUT_DIV, 4 },
> };
>
> static const struct clk_parent_data disp_cc_parent_data_2[] = {
> @@ -153,8 +154,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
>
> static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = {
> F(19200000, P_BI_TCXO_AO, 1, 0, 0),
> - F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0),
> - F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0),
> + F(37500000, P_GPLL0_OUT_DIV, 8, 0, 0),
> + F(75000000, P_GPLL0_OUT_DIV, 4, 0, 0),
> { }
> };
>
>
> --
> 2.40.0
>
