No worries. I wanted to isolate what specifically fixes the problem
myself in order to make a minimal patch. I'm also hoping for some help
regarding information, as I don't have access to official QSD8250
documentation.
I've found the key register that differs between between how it is
initialized for Windows CE and for Linux, and solves the problem for us.
It is the Auxilliary Control Register (cp15, 0, c1, c0, 1).
For Windows CE it is initialized to 0x002C0077
(=0b00000000001011000000000001110111)
For Linux it is initialized to 0x000C0037
(=0b00000000000011000000000000110111)
The following page explains this register for the Cortex-A8, the ARM
core on which the QSD8250 is based:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344k/Bgbffjhh.html
The 7th bit (bit 6 on that page) controls the behaviour of the
Invalidate All & by MVA instructions. It needs to be disabled for Linux.
The 22nd bit, however, is in an area marked as "reserved" on that page.
I am very curious what this bit does. Maybe this reserved area is
documented in QSD8250 documentation? Could anyone provide clearity about
this bit?
In conclusion, we are able to continue our work using the following asm,
but do not know what the second flag means:
MRC p15, 0, r0, c1, c0, 1
BIC r0, #0x40
BIC r0, #0x200000
MCR p15, 0, r0, c1, c0, 1
Thanks in advance for any information.
Regards,
Martijn
On 06/29/2010 06:49 PM, Daniel Walker wrote:
Don't do it on my account, I was just wondering if that was discovered..
Daniel
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