Re: [PATCH RESEND percpu#for-next] percpu: align percpu readmostly subsection to cacheline

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Hello,

On Mon, Dec 27, 2010 at 09:43:09PM +0100, Sam Ravnborg wrote:
> > diff --git a/arch/alpha/kernel/vmlinux.lds.S b/arch/alpha/kernel/vmlinux.lds.S
> > index 003ef4c..173518f 100644
> > --- a/arch/alpha/kernel/vmlinux.lds.S
> > +++ b/arch/alpha/kernel/vmlinux.lds.S
> > @@ -38,7 +38,7 @@ SECTIONS
> >  	__init_begin = ALIGN(PAGE_SIZE);
> >  	INIT_TEXT_SECTION(PAGE_SIZE)
> >  	INIT_DATA_SECTION(16)
> > -	PERCPU(PAGE_SIZE)
> > +	PERCPU(64, PAGE_SIZE)
> >  	/* Align to THREAD_SIZE rather than PAGE_SIZE here so any padding page
> >  	   needed for the THREAD_SIZE aligned init_task gets freed after init */
> >  	. = ALIGN(THREAD_SIZE);
> 
> It would have been better to include cache.h and then use L1_CACHE_BYTES,
> as the value differs for EV4.
> It will work with 64 as this is the bigger of the two.

Hmmm... I took the 64 from RW_DATA_SECTION() macro.  If L1_CACHE_BYTES
is better fit for PERCPU, I'm pretty sure we would be better off with
that for RW_DATA_SECTION() too.  I'll follow up with a patch to change
both to L1_CACHE_BYTES.

> It looks like we could do this for almost all archs.
> But then I am not sure if "L1_CACHE_BYTES" is the same as
> a cacheline on the different archs.

hpa already replied but it seems that different archs have subtle
differences regarding which cacheline size determines what.  If we
want to unify this, it probably would be best to define
INTERNODE_CACHE_BYTES on all archs and use it for all places where
false sharing should be avoided.

Thanks.

-- 
tejun
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