Linus Torvalds writes: > They are almost inevitable for another reason too: the interconnect seldom > has a concept of "clock signal" other than for the signalling itself, and > the signal clock is designed for the signal itself and is designed for > signal integrity rather than "stable clock". > > Does _any_ common interconnect have integral support for clock > distribution? I realize you're asking about x86, but just for interest, this is what POWER6 does to give us a timebase register that increments at 512MHz and is synchronized across the machine (i.e. sufficiently well synchronized that the difference between the timebases on any two cores is less than the time taken for them to synchronize via a memory location). The hardware distributes a 32MHz clock pulse to all nodes, which increments the upper 60 bits of the timebase and clears the bottom 4 bits. The bottom 4 bits are then incremented at a rate that is the processor clock speed divided by some number N set by the hypervisor. The bottom 4 bits also stop incrementing once they reach 0xf. This seems to work pretty well in practice and avoids the need for hardware to distribute a synchronous 512MHz clock everywhere. Paul. -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
