Re: [PATCH 0/7] Resume BYT/CHT LPSS I2C controller before the iGPU

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On Thu, Sep 20, 2018 at 10:07:01AM +0200, Rafael J. Wysocki wrote:
> > I forgot to mention that I've tested this series on the following device
> > which had the mentioned errors:
> > 
> > GPD win:
> > CHT device with a Whiskey Cove PMIC, PMIC I2C bus free for kernel use
> > 
> > And on the following other 3 devices to make sure that I covered all
> > combinations of BYT/CHT and PMIC with/without its I2C bus shared with
> > the PUNIT:
> > 
> > Chuwi Hi8 Pro:
> > CHT device with an AXP288 PMIC, with its I2C bus shared between the PUNIT and the kernel
> > 
> > Asus T100TA:
> > BYT device with a Crystal Cove PMIC, PMIC I2C bus free for kernel use
> > 
> > Peaq C1010 2-in-1:
> > BYT device with an AXP288 PMIC, with its I2C bus shared between the PUNIT and the kernel
> > 
> > And all 4 work fine with this series applied.
> 
> OK
> 
> It looks reasonable to me overall, but I'll give Mika/Andy and others some
> time to leave comments if any.

Looks good to me as well. Nice work Hans! :)



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