On Tue, Nov 08, 2022 at 04:03:23PM +0000, Sudeep Holla wrote: > On Tue, Nov 08, 2022 at 12:04:17PM +0100, Pierre Gondois wrote: > > Riscv's implementation of init_of_cache_level() is following > > the Devicetree Specification v0.3 regarding caches, cf.: > > - s3.7.3 'Internal (L1) Cache Properties' > > - s3.8 'Multi-level and Shared Cache Nodes' > > > > Allow reusing the implementation by moving it. > > > > Reviewed-by: Sudeep Holla <sudeep.holla@xxxxxxx> > Forgot to mention earlier, I prefer to s/riscv/RISC-V/ s/implem/implementation/ -- Regards, Sudeep