On Wed, Jan 08, 2014 at 06:35:00PM -0500, Hu Yaohui wrote: > Thanks a lot Marcelo! > > On Wed, Jan 8, 2014 at 6:25 PM, Marcelo Tosatti <mtosatti@xxxxxxxxxx> wrote: > > On Wed, Jan 08, 2014 at 06:14:15PM -0500, Hu Yaohui wrote: > >> Hi guys, > >> I think you should be pretty familiar with lapic. I would really > >> appreciate it if someone could shed some lights on my problem > >> regarding Guest TLB flush IPI. > >> Supposed we get two vcpus 0 and 1. > >> When vcpu#0 wants to invalidate the tlb entry on vcpu#1. An IPI will > >> be generated by lapic on vcpu#0 by writing to ICR which will cause a > >> vmexit. > >> apic_send_ipi->kvm_irq_delivery_to_apic->kvm_apic_set_irq->__apic_accept_irq > >> In __apic_accept_irq, it will call kvm_make_request, kvm_vcpu_kick. > >> If vcpu#1 in guest mode, how can it receives this IPI immediately, or > >> the stale tlb entry could be accessed. Thanks for your time! > > > I am using kvm-kmod-3.2 > > Two possibilities: > > > > 2) Hardware does not support APIC virtualization: kvm_vcpu_kick sends an > > host-IPI to the remote vcpu, and if that vcpu is in guest mode, a VM-exit > > (exit reason: external interrupt) will be triggered due to the host-IPI. > > Then on VM-entry (inject_pending_event) the guest-IPI is injected. > > > if vcpu#1 is not on the same pcpu as the vcpu#0, a host-IPI will be sent. Yes. > But if they are on the same pcpu, if vcpu#1 is in guest mode. If vcpu#0 and vcpu#1 are on the same pcpu, then either one of them is guest mode at one given moment, but not both. > Then the > guest tlb flush IPI > will wait until the next vcpu#1 vmexit. If that's the case. they are > some time that the tlb entry has been > invalidated in vcpu#0, but the corresponding entry in vcpu#1 could > still been accessed, which seems cause some problem. The TLB flush is performed synchronously, see the effect of the wait parameter to the smp_call_function_many function, and how that function is called at arch/x86/mm/tlb.c. > > 2) Host CPU supports APIC virtualization (see commit 83d4c286931c and > > Intel's documentation): > > A bit is set in the posted interrupt section, and a special host-IPI is > > delivered to the target cpu where the guest vcpu is scheduled > > (vmx_deliver_posted_interrupt) which causes the hardware to > > inject the vector (without VM-exit). > > > > > I did not find this function (vmx_deliver_posted_interrupt) in my kvm > kernel module. > Does that mean my hardware doesn't support APIC virtualization? No, it means the kvm codebase you are looking at does not support it. > Thanks for your time! > > Best Wishes, > Yaohui Hu > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
