Hi guys, I think you should be pretty familiar with lapic. I would really appreciate it if someone could shed some lights on my problem regarding Guest TLB flush IPI. Supposed we get two vcpus 0 and 1. When vcpu#0 wants to invalidate the tlb entry on vcpu#1. An IPI will be generated by lapic on vcpu#0 by writing to ICR which will cause a vmexit. apic_send_ipi->kvm_irq_delivery_to_apic->kvm_apic_set_irq->__apic_accept_irq In __apic_accept_irq, it will call kvm_make_request, kvm_vcpu_kick. If vcpu#1 in guest mode, how can it receives this IPI immediately, or the stale tlb entry could be accessed. Thanks for your time! Best Wishes, Yaohui Hu On Wed, Jan 8, 2014 at 4:10 PM, Marcelo Tosatti <mtosatti@xxxxxxxxxx> wrote: > On Thu, Jan 02, 2014 at 05:14:11PM +0800, Chen Fan wrote: >> fix the 'vcpi' typos when apic_debug is enabled. >> >> Signed-off-by: Chen Fan <chen.fan.fnst@xxxxxxxxxxxxxx> >> --- >> arch/x86/kvm/lapic.c | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) > > Applied, thanks. > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
