On Wed, Jan 08, 2014 at 06:14:15PM -0500, Hu Yaohui wrote: > Hi guys, > I think you should be pretty familiar with lapic. I would really > appreciate it if someone could shed some lights on my problem > regarding Guest TLB flush IPI. > Supposed we get two vcpus 0 and 1. > When vcpu#0 wants to invalidate the tlb entry on vcpu#1. An IPI will > be generated by lapic on vcpu#0 by writing to ICR which will cause a > vmexit. > apic_send_ipi->kvm_irq_delivery_to_apic->kvm_apic_set_irq->__apic_accept_irq > In __apic_accept_irq, it will call kvm_make_request, kvm_vcpu_kick. > If vcpu#1 in guest mode, how can it receives this IPI immediately, or > the stale tlb entry could be accessed. Thanks for your time! Two possibilities: 2) Hardware does not support APIC virtualization: kvm_vcpu_kick sends an host-IPI to the remote vcpu, and if that vcpu is in guest mode, a VM-exit (exit reason: external interrupt) will be triggered due to the host-IPI. Then on VM-entry (inject_pending_event) the guest-IPI is injected. 2) Host CPU supports APIC virtualization (see commit 83d4c286931c and Intel's documentation): A bit is set in the posted interrupt section, and a special host-IPI is delivered to the target cpu where the guest vcpu is scheduled (vmx_deliver_posted_interrupt) which causes the hardware to inject the vector (without VM-exit). -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
