[PATCH] apic: test tsc deadline timer

["Liu, Jinsong" <jinsong.liu@xxxxxxxxx>]

Marcelo,

I add test case for tsc deadline timer https://github.com/avikivity/kvm-unit-tests, as attached.

According to the kvm-unit-tests README, I try to run
qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=apic.out -kernel ./x86/apic.flat
but get nothing from the testlog 'apic.out'
(BTW, at kvm side I did observe the expected tsc deadline timer action)

I also try to run the README example
qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -kernel ./x86/msr.flat
but still get nothing from 'msr.out'

Do I miss something? how can I get test log?

Thanks,
Jinsong

==================
>From 92d05a2caca4d0a35651bd06b88cf78b4e24d5b7 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@xxxxxxxxx>
Date: Sun, 9 Oct 2011 17:16:17 +0800
Subject: [PATCH] apic: test tsc deadline timer

Test tsc deadline timer: detect tsc deadline timer support by CPUID,
enable tsc deadline timer mode by MMIO, then start tsc deadline timer by WRMSR.

Signed-off-by: Liu, Jinsong <jinsong.liu@xxxxxxxxx>
---
 x86/apic.c |   53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/x86/apic.c b/x86/apic.c
index c51e6a5..b086663 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -25,6 +25,57 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define TSC_DEADLINE_TIMER_MODE (2 << 17)
+#define TSC_DEADLINE_TIMER_VECTOR 0xef
+#define MSR_IA32_TSC            0x00000010
+#define MSR_IA32_TSCDEADLINE    0x000006e0
+
+static int tdt_count;
+
+static void tsc_deadline_timer_isr(isr_regs_t *regs)
+{
+    ++tdt_count;
+}
+
+static void start_tsc_deadline_timer(void)
+{
+    unsigned a, d;
+
+    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+    irq_enable();
+
+    asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_IA32_TSC));
+    asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_IA32_TSCDEADLINE));
+    asm volatile ("nop");
+    report("tsc deadline timer", tdt_count == 1);
+}
+
+static int enable_tsc_deadline_timer(void)
+{
+    unsigned a, b, c, d;
+    uint32_t lvtt;
+
+    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
+
+    if (c & (1 << 24)) {
+        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
+        apic_write(APIC_LVTT, lvtt);
+        start_tsc_deadline_timer();
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static void test_tsc_deadline_timer(void)
+{
+    if(enable_tsc_deadline_timer()) {
+        printf("tsc deadline timer enabled\n");
+    } else {
+        printf("tsc deadline timer not detected\n");
+    }
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 void test_enable_x2apic(void)
@@ -291,6 +342,8 @@ int main()
     test_sti_nmi();
     test_multiple_nmi();
 
+    test_tsc_deadline_timer();
+
     printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
 
     return g_fail != 0;
-- 
1.6.5.6

Attachment: test-tsc-deadline-timer.patch
Description: test-tsc-deadline-timer.patch