Quoting Claudio Imbrenda (2023-03-29 15:00:32) > On Wed, 29 Mar 2023 14:50:50 +0200 > Nico Boehr <nrb@xxxxxxxxxxxxx> wrote: > > > Quoting Janosch Frank (2023-03-28 16:13:04) > > > On 3/27/23 10:21, Nico Boehr wrote: > > > > This is to prepare for running guests without MSO/MSL, which is > > > > currently not possible. > > > > > > > > We already have code in sie64a to setup a guest primary ASCE before > > > > entering SIE, so we can in theory switch to the page tables which > > > > translate gpa to hpa. > > > > > > > > But the host is running in primary space mode already, so changing the > > > > primary ASCE before entering SIE will also affect the host's code and > > > > data. > > > > > > > > To make this switch useful, the host should run in a different address > > > > space mode. Hence, set up and change to home address space mode before > > > > installing the guest ASCE. > > > > > > > > The home space ASCE is just copied over from the primary space ASCE, so > > > > no functional change is intended, also for tests that want to use > > > > MSO/MSL. If a test intends to use a different primary space ASCE, it can > > > > now just set the guest.asce in the save_area. > > > > > > > [...] > > > > + /* set up home address space to match primary space */ > > > > + old_cr13 = stctg(13); > > > > + lctlg(13, stctg(1)); > > > > + > > > > + /* switch to home space so guest tables can be different from host */ > > > > + psw_mask_set_bits(PSW_MASK_HOME); > > > > + > > > > + /* also handle all interruptions in home space while in SIE */ > > > > + lowcore.pgm_new_psw.mask |= PSW_MASK_DAT_HOME; > > > > > > > + lowcore.ext_new_psw.mask |= PSW_MASK_DAT_HOME; > > > > + lowcore.io_new_psw.mask |= PSW_MASK_DAT_HOME; > > > We didn't enable DAT in these two cases as far as I can see so this is > > > superfluous or we should change the mmu code. Also it's missing the svc > > > and machine check. > > > > Right. Is there a particular reason why we only run DAT on for PGM ints? > > a fixup handler for PGM it might need to run with DAT on (e.g. to > access data that is not identity mapped), whereas for other interrupts > it's not needed (at least not yet ;) ) Makes sense. Since one can register a cleanup for io and ext, too, I think we need to fix the mmu init for these cases while at it. Will do that in v2.
