On 3/27/23 10:21, Nico Boehr wrote:
This is to prepare for running guests without MSO/MSL, which is
currently not possible.
We already have code in sie64a to setup a guest primary ASCE before
entering SIE, so we can in theory switch to the page tables which
translate gpa to hpa.
But the host is running in primary space mode already, so changing the
primary ASCE before entering SIE will also affect the host's code and
data.
To make this switch useful, the host should run in a different address
space mode. Hence, set up and change to home address space mode before
installing the guest ASCE.
The home space ASCE is just copied over from the primary space ASCE, so
no functional change is intended, also for tests that want to use
MSO/MSL. If a test intends to use a different primary space ASCE, it can
now just set the guest.asce in the save_area.
[...]
+ /* set up home address space to match primary space */
+ old_cr13 = stctg(13);
+ lctlg(13, stctg(1));
+
+ /* switch to home space so guest tables can be different from host */
+ psw_mask_set_bits(PSW_MASK_HOME);
+
+ /* also handle all interruptions in home space while in SIE */
+ lowcore.pgm_new_psw.mask |= PSW_MASK_DAT_HOME;
+ lowcore.ext_new_psw.mask |= PSW_MASK_DAT_HOME;
+ lowcore.io_new_psw.mask |= PSW_MASK_DAT_HOME;
We didn't enable DAT in these two cases as far as I can see so this is
superfluous or we should change the mmu code. Also it's missing the svc
and machine check.
The whole bit manipulation thing looks a bit crude. It might make more
sense to drop into real mode for a few instructions and have a dedicated
storage location for an extended PSW mask and an interrupt ASCE as part
of the interrupt call code instead.
Opinions?
+ mb();
+
while (vm->sblk->icptcode == 0) {
sie64a(vm->sblk, &vm->save_area);
sie_handle_validity(vm);
@@ -60,6 +75,17 @@ void sie(struct vm *vm)
vm->save_area.guest.grs[14] = vm->sblk->gg14;
vm->save_area.guest.grs[15] = vm->sblk->gg15;
+ lowcore.pgm_new_psw.mask &= ~PSW_MASK_HOME;
+ lowcore.ext_new_psw.mask &= ~PSW_MASK_HOME;
+ lowcore.io_new_psw.mask &= ~PSW_MASK_HOME;
+ mb();
+
+ psw_mask_clear_bits(PSW_MASK_HOME);
+
+ /* restore the old CR 13 */
+ lctlg(13, old_cr13);
+
+
if (vm->sblk->sdf == 2)
memcpy(vm->save_area.guest.grs, vm->sblk->pv_grregs,
sizeof(vm->save_area.guest.grs));
diff --git a/lib/s390x/sie.h b/lib/s390x/sie.h
index 147cb0f2a556..0b00fb709776 100644
--- a/lib/s390x/sie.h
+++ b/lib/s390x/sie.h
@@ -284,5 +284,6 @@ void sie_handle_validity(struct vm *vm);
void sie_guest_sca_create(struct vm *vm);
void sie_guest_create(struct vm *vm, uint64_t guest_mem, uint64_t guest_mem_len);
void sie_guest_destroy(struct vm *vm);
+bool sie_had_pgm_int(struct vm *vm);
#endif /* _S390X_SIE_H_ */
