On Mon, Oct 24, 2022, Like Xu wrote: > The patch set includes all the changes on my side (SPR PEBS and AMD > PerfMonV2 are included, except for Arch lbr), which helps to keep the > review time focused. > > There are no major changes in the test logic. A considerable number of > helpers have been added to lib/x86/pmu.[c,h], which really helps the > readability of the code, while hiding some hardware differentiation details. > > These are divided into three parts, the first part (01 - 08) is bug fixing, > the second part (09 - 18) is code refactoring, and the third part is the > addition of new test cases. It may also be good to split up and merge > in sequence. They get passed on AMD Zen3/4, Intel ICX/SPR machines. Quite a few comments, some which result in a fair bit of fallout, e.g. avoiding the global cpuid_10, tabs. vs. spaces, etc... I've made all the changes locally and have a few additional cleanup patches. I'll post a v5 once testing looks ok, hopefully this week.
