On Mon, Oct 24, 2022, Like Xu wrote:
> +static inline u32 fixed_counter_msr(unsigned int i)
> +{
> + return MSR_CORE_PERF_FIXED_CTR0 + i;
This should be added in a separate patch.
> +}
> +
> +static inline void write_fixed_counter_value(unsigned int i, u64 value)
> +{
> + wrmsr(fixed_counter_msr(i), value);
> +}
> +
> +static inline void reset_all_gp_counters(void)
> +{
> + unsigned int idx;
> +
> + for (idx = 0; idx < pmu_nr_gp_counters(); idx++) {
> + write_gp_event_select(idx, 0);
> + write_gp_counter_value(idx, 0);
> + }
> +}
> +
> +static inline void reset_all_fixed_counters(void)
> +{
> + unsigned int idx;
> +
> + if (!pmu_nr_fixed_counters())
> + return;
> +
> + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, 0);
> + for (idx = 0; idx < pmu_nr_fixed_counters(); idx++)
> + write_fixed_counter_value(idx, 0);
> +}
> +
> +static inline void reset_all_counters(void)
Prefix these with "pmu_" so that it's obvious what counters are being rese.
> +{
> + reset_all_gp_counters();
> + reset_all_fixed_counters();
> +}
