On Thu, Sep 23, 2021 at 03:10:47AM +0000, Tian, Kevin wrote:
> Disabling wbinvd is one purpose. imo the more important intention
> is that iommu vendor uses different PTE formats between snoop and
> !snoop.
The PTE format for userspace is communicated through the format input,
not through random flags. If Intel has two different PTE formats then
userspace must negotiate which to use via the format input.
If the kernel controls the PTE then the format doesn't matter and the
kernel should configure things to match the requested behavior
> When creating an ioas there could be three snoop modes:
>
> 1) snoop for all attached devices;
> 2) non-snoop for all attached devices;
> 3) device-selected snoop;
I'd express the three cases like this:
0
ARM can avoid cache shooping, must use arch cache flush helpers
IOMMU_CACHE
Normal DMAs get cache coherence, do not need arch cache flush helpers
IOMMU_CACHE | IOMMU_BLOCK_NO_SNOOP
All DMAs get cache coherence, not supported on ARM
Jason
