> From: Tian, Kevin > Sent: Thursday, September 23, 2021 11:11 AM > > > > > The required behavior for iommufd is to have the IOMMU ignore the > > no-snoop bit so that Intel HW can disable wbinvd. This bit should be > > clearly documented for its exact purpose and if other arches also have > > instructions that need to be disabled if snoop TLPs are allowed then > > they can re-use this bit. It appears ARM does not have this issue and > > does not need the bit. > > Disabling wbinvd is one purpose. imo the more important intention > is that iommu vendor uses different PTE formats between snoop and > !snoop. As long as we want allow userspace to opt in case of isoch > performance requirement (unlike current vfio which always choose > snoop format if available), such mechanism is required for all vendors. > btw I'm not sure whether the wbinvd trick is Intel specific. All other platforms (amd, arm, s390, etc.) currently always claim OMMU_CAP_ CACHE_COHERENCY (the source of IOMMU_CACHE). They didn't hit this problem because vfio always sets IOMMU_CACHE to force every DMA to snoop. Will they need to handle similar wbinvd-like trick (plus necessary memory type virtualization) when non-snoop format is enabled? Or are their architectures highly optimized to afford isoch traffic even with snoop (then fine to not support user opt-in)? Thanks Kevin
