On 07.04.2015 11:23, Jan Kiszka wrote:
On 2015-04-07 08:19, Valentine Sinitsyn wrote:
On 07.04.2015 11:13, Jan Kiszka wrote:
It is, at least 160 cycles with hot caches on an AMD A6-5200 APU, more
towards 600 if they are colder (added some usleep to each loop in the
test).
Great, thanks. Could you post absolute numbers, i.e how long do A and B
take on your CPU?
A is around 1910 cycles, B about 1750.
It's with hot caches I guess? Not bad anyways, it's a pity I didn't
observe this and didn't include this optimization from the day one.
Yes, that is with the unmodified benchmark I sent. When I add, say
usleep(1000) to that loop body, the cycles jumped to 4k (IIRC).
BTW, this is the Jailhouse patch:
https://github.com/siemens/jailhouse/commit/dbf2fe479ac07a677462dfa87e008e37a4e72858
I guess, it's getting off-topic here, but wouldn't it be cleaner to
simply use wrmsr and rdmsr instead of vmload and vmsave in svm-vmexit.S?
This would require less changes and will keep all entry/exit setup code
in one place.
Valentine
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