On Mon, Jan 20, 2020 at 05:55:17PM +0000, Marc Zyngier wrote: > On 2020-01-02 12:39, Andrew Murray wrote: > > ARMv8.5-PMU introduces 64-bit event counters, however KVM doesn't yet > > support this. Let's trap the Debug Feature Registers in order to limit > > PMUVer/PerfMon in the Debug Feature Registers to PMUv3 for ARMv8.4. > > > > Signed-off-by: Andrew Murray <andrew.murray@xxxxxxx> > > Reviewed-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx> > > --- > > arch/arm64/include/asm/sysreg.h | 4 ++++ > > arch/arm64/kvm/sys_regs.c | 36 +++++++++++++++++++++++++++++++-- > > 2 files changed, 38 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/include/asm/sysreg.h > > b/arch/arm64/include/asm/sysreg.h > > index 6e919fafb43d..1b74f275a115 100644 > > --- a/arch/arm64/include/asm/sysreg.h > > +++ b/arch/arm64/include/asm/sysreg.h > > @@ -672,6 +672,10 @@ > > #define ID_AA64DFR0_TRACEVER_SHIFT 4 > > #define ID_AA64DFR0_DEBUGVER_SHIFT 0 > > > > +#define ID_DFR0_PERFMON_SHIFT 24 > > + > > +#define ID_DFR0_EL1_PMUVER_8_4 5 > > + > > #define ID_ISAR5_RDM_SHIFT 24 > > #define ID_ISAR5_CRC32_SHIFT 16 > > #define ID_ISAR5_SHA2_SHIFT 12 > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index 9f2165937f7d..61b984d934d1 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -668,6 +668,37 @@ static bool > > pmu_access_event_counter_el0_disabled(struct kvm_vcpu *vcpu) > > return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_ER | > > ARMV8_PMU_USERENR_EN); > > } > > > > +static bool access_id_aa64dfr0_el1(struct kvm_vcpu *vcpu, > > + struct sys_reg_params *p, > > + const struct sys_reg_desc *rd) > > +{ > > + if (p->is_write) > > + return write_to_read_only(vcpu, p, rd); > > + > > + /* Limit guests to PMUv3 for ARMv8.4 */ > > + p->regval = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1); > > + p->regval = cpuid_feature_cap_signed_field_width(p->regval, > > + ID_AA64DFR0_PMUVER_SHIFT, > > + 4, ID_DFR0_EL1_PMUVER_8_4); > > + > > + return p->regval; > > If feels very odd to return the register value in place of a something > that actually indicates whether we should update the PC or not. I have > no idea what is happening here in this case. Crikey, yes, I missed that and it probably explains why the code looks so odd. Andrew -- is there a missing hunk or something here? Will _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm