On 2019-11-13 12:50, Steven Price wrote:
Cortex-A57/A72 have a similar errata to Cortex-A76 regarding
speculation
of the AT instruction. Since the workaround for A57/A72 doesn't
require
VHE, the restriction enforcing VHE for A76 can be removed by
combining
the workaround flag for both errata.
Are we sure that A76 behaves the same as A57/A72 when it comes to not
caching any of the EPD* bits in the TLB? Because the 1319367 workaround
has a lot of the A72 microarch implicit to it, and I'm not sure this
works as is on A76 or A55...
The patch itself looks OK, but I'd like some reassurance about the
above.
M.
--
Jazz is not dead. It just smells funny...
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