Peter Maydell <peter.maydell@xxxxxxxxxx> writes: > On 11 September 2012 07:10, Rusty Russell <rusty.russell@xxxxxxxxxx> wrote: >> +#define KVM_REG_ARM_VFP_ID_FPSID 0x1000 >> +#define KVM_REG_ARM_VFP_ID_FPSCR 0x1001 >> +#define KVM_REG_ARM_VFP_ID_MVFR0 0x1006 >> +#define KVM_REG_ARM_VFP_ID_MVFR1 0x1007 >> +#define KVM_REG_ARM_VFP_ID_FPEXC 0x1008 >> +#define KVM_REG_ARM_VFP_ID_FPINST 0x1009 >> +#define KVM_REG_ARM_VFP_ID_FPINST2 0x100A > > These almost but don't quite match the system register > encoding used by the hardware (cf ARM ARM Table B1-24): for > hardware MVFR1 is 6 and MVFR0 is 7. I'm assuming the intention > is to match the hardware encoding... Yes, I prefer to use existing encoding if possible. I missed that MVFR0 and MVFR1 are backwards. Fixed, thanks, Rusty. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
