On Fri, Jun 17, 2016 at 06:48:45PM +0300, Imre Deak wrote: > Atm on ILK we attempt to detect if eDP is present even if LVDS was > already detected and an encoder for it was registered. This involves > trying to read out the eDP EDID, which in turn needs the same power > sequencer that LVDS uses. Poking at the VDD line at an unexpected time > may or may not interfere with the LVDS panel, but it's probably safer to > prevent this. Registering both an LVDS and an eDP connector would also > present a similar problem accessing the shared PPS at any point later in > an unexpected way. > > This was caught by CI with the PPS sanity checks in place and the > initial eDP EDID readout waiting for the panel power cycle timeout > without the PPS registers being initialized. To solve this latter > problem move PPS register init earlier before the first use of the > PPS. This looks like two patches. To the best of my knowledge a system cannot have both LVDS and eDP, so that part looks sane - the only danger being ghost LVDS. And checking for LVDS in eDP init seems like the easiest way to pull it all together, but it does depend upon LVDS being completed first. That's an issue in a parallel future, the dependency will have to be tracked. The second issue of using pps too early looks trivial... That part I can Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
