On Tue, Jun 14, 2016 at 08:10:52PM +0530, Sharma, Shashank wrote: > Regards > Shashank > > On 6/14/2016 7:46 PM, Ville Syrjälä wrote: > > On Mon, Jun 13, 2016 at 06:58:19PM +0530, Sharma, Shashank wrote: > >> Regards > >> Shashank > >> > >> On 6/3/2016 1:25 AM, ville.syrjala@xxxxxxxxxxxxxxx wrote: > >>> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >>> > >>> The video DIP can be used with DP ports as well. So let's at least read > >>> out the state, and disable all infoframes when disabling the port. > >>> Otherwise we might get left with whatever the previous guy was doing. > >>> > >>> If we were totally paranaoid, I suppose we might consider doing this > >>> for FDI too on DDI platforms. But that would require first decoupling > >>> the infoframe code from intel_digital_port. So leave it be for now at > >>> least. > >>> > >>> FIXME need to figure out how to handle the PSR VSC SDP usage before > >>> doing this, as that might make the state checker unhappy. > >>> > >>> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >>> --- > >>> drivers/gpu/drm/i915/intel_ddi.c | 13 ++++++++----- > >>> drivers/gpu/drm/i915/intel_dp.c | 9 +++++++++ > >>> 2 files changed, 17 insertions(+), 5 deletions(-) > >>> > >>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > >>> index c5611e9d9b9c..6543feeb58f2 100644 > >>> --- a/drivers/gpu/drm/i915/intel_ddi.c > >>> +++ b/drivers/gpu/drm/i915/intel_ddi.c > >>> @@ -2157,7 +2157,6 @@ void intel_ddi_get_config(struct intel_encoder *encoder, > >>> struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; > >>> struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); > >>> enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; > >>> - struct intel_digital_port *intel_dig_port; > >>> u32 temp, flags = 0; > >>> > >>> /* XXX: DSI transcoder paranoia */ > >>> @@ -2193,13 +2192,17 @@ void intel_ddi_get_config(struct intel_encoder *encoder, > >>> break; > >>> } > >>> > >>> - switch (temp & TRANS_DDI_MODE_SELECT_MASK) { > >>> - case TRANS_DDI_MODE_SELECT_HDMI: > >>> - pipe_config->has_hdmi_sink = true; > >>> - intel_dig_port = enc_to_dig_port(&encoder->base); > >>> + if (encoder->type != INTEL_OUTPUT_ANALOG) { > >> This will be true for INTEL_OUTPUT_UNUSED, UNKNOWN, eDP, and bunch of > >> more encoder types. Should we add a bit mask for valid encoder types here ? > > > > We only need to care about FDI vs. not. If it's not FDI, then it'll be > > a DDI encoder which has struct intel_digital_port as its base. > But again, what if I got a INTEL_OUTPUT_UNKNOWN here, should we even > bother to call a infoframe_enabled() for that ? Wont it be better if we > can just allow (DP | HDMI | eDP etc) ? UNKNOWN is the same thing as DP/eDP/HDMI. > > > >>> + struct intel_digital_port *intel_dig_port = > >>> + enc_to_dig_port(&encoder->base); > >>> > >>> if (intel_dig_port->infoframe_enabled(&encoder->base, pipe_config)) > >>> pipe_config->has_infoframe = true; > >>> + } > >>> + > >>> + switch (temp & TRANS_DDI_MODE_SELECT_MASK) { > >>> + case TRANS_DDI_MODE_SELECT_HDMI: > >>> + pipe_config->has_hdmi_sink = true; > >>> /* fall through */ > >>> case TRANS_DDI_MODE_SELECT_DVI: > >>> pipe_config->lane_count = 4; > >>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > >>> index a2d0ee363307..b43009ed1dab 100644 > >>> --- a/drivers/gpu/drm/i915/intel_dp.c > >>> +++ b/drivers/gpu/drm/i915/intel_dp.c > >>> @@ -2355,6 +2355,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, > >>> struct intel_crtc_state *pipe_config) > >>> { > >>> struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > >>> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > >>> u32 tmp, flags = 0; > >>> struct drm_device *dev = encoder->base.dev; > >>> struct drm_i915_private *dev_priv = dev->dev_private; > >>> @@ -2395,6 +2396,10 @@ static void intel_dp_get_config(struct intel_encoder *encoder, > >>> !IS_CHERRYVIEW(dev) && tmp & DP_COLOR_RANGE_16_235) > >>> pipe_config->limited_color_range = true; > >>> > >>> + if (intel_dig_port->infoframe_enabled && > >>> + intel_dig_port->infoframe_enabled(&encoder->base, pipe_config)) > >>> + pipe_config->has_infoframe = true; > >>> + > >>> pipe_config->has_dp_encoder = true; > >>> > >>> pipe_config->lane_count = > >>> @@ -3343,6 +3348,10 @@ intel_dp_link_down(struct intel_dp *intel_dp) > >>> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); > >>> } > >>> > >>> + if (intel_dig_port->set_infoframes) > >>> + intel_dig_port->set_infoframes(&intel_dig_port->base.base, > >>> + NULL, false); > >>> + > >>> msleep(intel_dp->panel_power_down_delay); > >>> > >>> intel_dp->DP = DP; > >>> > > -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx