Sorry Ville,
What is SRM?
Peter.
On Wed, 4 May 2016, Ville Syrjälä wrote:
On Wed, May 04, 2016 at 02:23:35PM +0000, Antoine, Peter wrote:
No, It's not debug.
It's for syncing and aligning (and validating) the open-source userspace with the kernel cache policy.
Why doesn't userspace just use SRM to read registers? The spec gives me
the impression that SRM doesn't care whether the register is privileged
or not.
As for the name being wrong, I'll change that.
As for the sysfs, would you prefer the following structure:
mocs/size
mocs/control_state
mocs/l3cc_state
for the different tables?
Peter.
-----Original Message-----
From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx]
Sent: Wednesday, May 4, 2016 2:47 PM
To: Antoine, Peter <peter.antoine@xxxxxxxxx>
Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Widawsky, Benjamin <benjamin.widawsky@xxxxxxxxx>
Subject: Re: [PATCH] drm/i915/sysfs: Adding mocs_state
On Wed, May 04, 2016 at 02:32:53PM +0100, Peter Antoine wrote:
Will wait for more comments, then will respin with a different commit
message. Is the rest of the patch ok?
No, you've put debug information into sysfs. (Also sysfs is one value per
file.) sysfs does not match your goal of validation. And you exported an internal function (get_mocs...) without giving it a proper name.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Peter Antoine (Android Graphics Driver Software Engineer)
---------------------------------------------------------------------
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
