The following patch adds the current MOCS state to the sysfs file system. This patch has been added so that userspace can validate the MOCS settings that have been programmed. Tracked-On: https://jira01.devtools.intel.com/browse/VIZ-7767 Signed-off-by: Peter Antoine <peter.antoine@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_sysfs.c | 32 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_mocs.c | 15 ++------------- drivers/gpu/drm/i915/intel_mocs.h | 13 +++++++++++++ 3 files changed, 47 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 2d576b7..f5de921 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -31,6 +31,7 @@ #include <linux/sysfs.h> #include "intel_drv.h" #include "i915_drv.h" +#include "intel_mocs.h" #define dev_to_drm_minor(d) dev_get_drvdata((d)) @@ -591,6 +592,32 @@ static struct bin_attribute error_state_attr = { .write = error_state_write, }; +static ssize_t mocs_state_show_attr(struct device *kdev, + struct device_attribute *attr, + char *buf) +{ + struct drm_minor *minor = dev_to_drm_minor(kdev); + struct drm_device *dev = minor->dev; + struct drm_i915_mocs_table table; + ssize_t ret = 0; + u32 count; + + if (!get_mocs_settings(dev->dev_private, &table)) + return 0; + + for (count = 0; count < table.size; count++) { + ret += snprintf(buf + ret, + PAGE_SIZE - ret, + "0x%08x 0x%04x\n", + table.table[count].control_value, + table.table[count].l3cc_value); + } + + return ret; +} + +static DEVICE_ATTR(mocs_state, S_IRUGO, mocs_state_show_attr, NULL); + void i915_setup_sysfs(struct drm_device *dev) { int ret; @@ -640,6 +667,10 @@ void i915_setup_sysfs(struct drm_device *dev) &error_state_attr); if (ret) DRM_ERROR("error_state sysfs setup failed\n"); + + ret = device_create_file(dev->primary->kdev, &dev_attr_mocs_state); + if (ret) + DRM_ERROR("mocs_state failed to create: %d\n", ret); } void i915_teardown_sysfs(struct drm_device *dev) @@ -655,4 +686,5 @@ void i915_teardown_sysfs(struct drm_device *dev) sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6_attr_group); sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6p_attr_group); #endif + device_remove_file(dev->primary->kdev, &dev_attr_mocs_state); } diff --git a/drivers/gpu/drm/i915/intel_mocs.c b/drivers/gpu/drm/i915/intel_mocs.c index 6ba4bf7..199c5d7 100644 --- a/drivers/gpu/drm/i915/intel_mocs.c +++ b/drivers/gpu/drm/i915/intel_mocs.c @@ -24,17 +24,6 @@ #include "intel_lrc.h" #include "intel_ringbuffer.h" -/* structures required */ -struct drm_i915_mocs_entry { - u32 control_value; - u16 l3cc_value; -}; - -struct drm_i915_mocs_table { - u32 size; - const struct drm_i915_mocs_entry *table; -}; - /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */ #define LE_CACHEABILITY(value) ((value) << 0) #define LE_TGT_CACHE(value) ((value) << 2) @@ -138,8 +127,8 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = { * * Return: true if there are applicable MOCS settings for the device. */ -static bool get_mocs_settings(struct drm_i915_private *dev_priv, - struct drm_i915_mocs_table *table) +bool get_mocs_settings(struct drm_i915_private *dev_priv, + struct drm_i915_mocs_table *table) { bool result = false; diff --git a/drivers/gpu/drm/i915/intel_mocs.h b/drivers/gpu/drm/i915/intel_mocs.h index 4640299..ba39b8a 100644 --- a/drivers/gpu/drm/i915/intel_mocs.h +++ b/drivers/gpu/drm/i915/intel_mocs.h @@ -52,8 +52,21 @@ #include <drm/drmP.h> #include "i915_drv.h" +/* structures required */ +struct drm_i915_mocs_entry { + u32 control_value; + u16 l3cc_value; +}; + +struct drm_i915_mocs_table { + u32 size; + const struct drm_i915_mocs_entry *table; +}; + int intel_rcs_context_init_mocs(struct drm_i915_gem_request *req); void intel_mocs_init_l3cc_table(struct drm_device *dev); int intel_mocs_init_engine(struct intel_engine_cs *ring); +bool get_mocs_settings(struct drm_i915_private *dev_priv, + struct drm_i915_mocs_table *table); #endif -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
