Re: [PATCH 2/2] drm/i915/BXT: Tolerance at BXT DSI pipe_config comparison

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On Wednesday 13 April 2016 05:27 PM, Daniel Vetter wrote:
On Wed, Apr 13, 2016 at 1:48 PM, Daniel Vetter <daniel@xxxxxxxx> wrote:
On Wed, Apr 13, 2016 at 1:06 PM, Jani Nikula <jani.nikula@xxxxxxxxx> wrote:
Then fix adjusted_mode to have the timings in terms of txbyteclkhs
already. Problem solved.
I let Ville convince me there would be problems with that. Ville, care
to fill in the details?
If we change them too hard the accurate vblank timestamp stuff will be
upset. But then we only need to adjust horizontal timings for dsi,
whereas on gen5+ the vblank ts code uses the line counter (i.e.
vertical timings) only.

If it's just that it should work, and I don't think we have any other
users of the adjusted_mode.
Ok, I was wrong and we obviously need the right dotclock to compute
linedur_ns correctly in drm_calc_timestamping_constants(). So either
we adjust the dotclock of adjusted_mode too (imo makes most sense), or
we need yet another mode somewhere and use that for dsi cross checking
(real ugly imo). More I missed?
Another point to be considered:
And we program hsync, hfp and hbp in terms of txbyteclkhs to port register, which are not part of adjusted_mode. So for BXT DSI, we have to store them interms of txbyteclkhs and compare with hsync, hfp and hbp read from HW??
-Daniel

--
Thanks,
--Ram

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