✓ Fi.CI.BAT: success for Check pixel clock when setting mode

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== Summary ==

Series 3009v1 Check pixel clock when setting mode
http://patchwork.freedesktop.org/api/1.0/series/3009/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-b-frame-sequence:
                dmesg-warn -> PASS       (skl-i5k-2)
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (byt-nuc)

bdw-nuci7        total:156  pass:147  dwarn:0   dfail:0   fail:0   skip:9  
bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
bsw-nuc-2        total:159  pass:129  dwarn:0   dfail:0   fail:0   skip:30 
byt-nuc          total:159  pass:136  dwarn:0   dfail:0   fail:0   skip:23 
hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
hsw-gt2          total:159  pass:149  dwarn:0   dfail:0   fail:0   skip:10 
hsw-xps12        total:156  pass:146  dwarn:0   dfail:0   fail:0   skip:10 
ilk-hp8440p      total:159  pass:111  dwarn:0   dfail:0   fail:0   skip:48 
ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1342/

5d3deb0902a962218ad9b0e583e4d1bbdec29f9a drm-intel-nightly: 2016y-02m-01d-20h-05m-03s UTC integration manifest
a20919f8e17f365c8bc956fa0080f85ec2fc8613 drm/i915: TV pixel clock check
4ffb8a33501e94e3019b7823f6b607d2b4673755 drm/i915: CRT pixel clock check
1171c10d097e10362eb0c317c8c1f01d3d6da7d8 drm/i915: SDVO pixel clock check
aa4c8b657b332610ba2a0599aecf93353f73d8ab drm/i915: DisplayPort-MST pixel clock check
22bee8570e2ab9bd5db75d87a8f2bd6ea66c56f6 drm/i915: HDMI pixel clock check
5c53160f762743864cad2770e86f29185decb074 drm/i915: DisplayPort pixel clock check

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