On Fri, Dec 18, 2015 at 07:14:17AM -0800, Matt Roper wrote: > On Fri, Dec 18, 2015 at 05:10:12PM +0200, Ville Syrjälä wrote: > > On Fri, Dec 18, 2015 at 06:58:58AM -0800, Matt Roper wrote: > > > On Fri, Dec 18, 2015 at 12:35:47PM +0200, Ville Syrjälä wrote: > > > > On Wed, Dec 16, 2015 at 07:06:20PM -0800, Radhakrishna Sripada wrote: > > > > > Original value of 32 blocks is not sufficient when using cursor size of > > > > > 256x256 causing FIFO underruns when the reworked wm > > > > > caluclations in > > > > > > > > > > commit 024c9045221fe45482863c47c4b4c47d37f97cbf > > > > > Author: Matt Roper <matthew.d.roper@xxxxxxxxx> > > > > > Date: Thu Sep 24 15:53:11 2015 -0700 > > > > > > > > > > drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v4) > > > > > > > > Well that commit is obviously incorrect. It's now using the pipe src > > > > width as the plane width for all planes. > > > > > > > > > > Yeah, we already noted that bug in another email thread, but decided > > > that it was unrelated to the problems Radhakrishna is facing. > > > Radhakrishna is only using a cursor (which doesn't use that buggy > > > function) > > > > Pop quiz: what does it use then? > > All non-cursor planes (i.e., primary+sprite). Cursors use a fixed DDB > allocation (currently 32 blocks as suggested by bspec, but > Radhakrishna's testing has found this to be too small, so his patch here > is bumping that number up. Oh I'm talking about the WM calculation, not the DDB allocation. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx