On Fri, Dec 18, 2015 at 06:58:58AM -0800, Matt Roper wrote: > On Fri, Dec 18, 2015 at 12:35:47PM +0200, Ville Syrjälä wrote: > > On Wed, Dec 16, 2015 at 07:06:20PM -0800, Radhakrishna Sripada wrote: > > > Original value of 32 blocks is not sufficient when using cursor size of > > > 256x256 causing FIFO underruns when the reworked wm > > > caluclations in > > > > > > commit 024c9045221fe45482863c47c4b4c47d37f97cbf > > > Author: Matt Roper <matthew.d.roper@xxxxxxxxx> > > > Date: Thu Sep 24 15:53:11 2015 -0700 > > > > > > drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v4) > > > > Well that commit is obviously incorrect. It's now using the pipe src > > width as the plane width for all planes. > > > > Yeah, we already noted that bug in another email thread, but decided > that it was unrelated to the problems Radhakrishna is facing. > Radhakrishna is only using a cursor (which doesn't use that buggy > function) Pop quiz: what does it use then? > and a full-screen primary plane, so the numbers don't actually > change (for his use case). > > Of course that bug is still worth fixing too; I was planning on writing > up a patch for it later today. > > > Matt > > > > > > > > are used. Increasing the number of blocks to 52 to make cursor plane tolerate > > > SAGV block time for the maximum possible cursor size. > > > > > > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx> > > > Signed-off-by: Kalyan Kondapally <kalyan.kondapally@xxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/intel_pm.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > > index d385d99..137fb68 100644 > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > @@ -2802,7 +2802,7 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, > > > static unsigned int skl_cursor_allocation(const struct intel_wm_config *config) > > > { > > > if (config->num_pipes_active == 1) > > > - return 32; > > > + return 52; > > > > > > return 8; > > > } > > > -- > > > 1.9.1 > > > > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > > Ville Syrjälä > > Intel OTC > > -- > Matt Roper > Graphics Software Engineer > IoTG Platform Enabling & Development > Intel Corporation > (916) 356-2795 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx