When the system is running low on memory, gem shrinker is invoked. In this process objects will be unbinded from GTT. For tiled objects, access to fence registers could be required while unbinding them. That requires a resume of gfx device, if suspended, in the shrinker path. This intermediate resume could cause power leakage. To avoid this intermediate resume of gfx device, don't consider tiled(fenced) objects for purge in the shrinker path. Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx> Signed-off-by: Praveen Paneri <praveen.paneri@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem_shrinker.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c b/drivers/gpu/drm/i915/i915_gem_shrinker.c index f7df54a..443432a 100644 --- a/drivers/gpu/drm/i915/i915_gem_shrinker.c +++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c @@ -129,6 +129,17 @@ i915_gem_shrink(struct drm_i915_private *dev_priv, if ((flags & I915_SHRINK_ACTIVE) == 0 && obj->active) continue; + /* + * Skip the unbinding of objects, possessing a fence + * register, if the device in the suspended state. + * Otherwise device has to be resumed before an access + * is made to the fence register on unbinding. + */ + if (HAS_RUNTIME_PM(dev_priv->dev) && + dev_priv->pm.suspended && + (obj->fence_reg != I915_FENCE_REG_NONE)) + continue; + drm_gem_object_reference(&obj->base); /* For the unbound phase, this should be a no-op! */ -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
