Thanks! I had question about power context.
I was curious about HW context and once dumped the GEM context object on
GEN6 before.
According to B-spec, Gen Graphics » BSpec » 3D-Media-GPGPU Engine »
Registers in Render Engine » Render Logical Context Data » Register
State Context [SNB+] » Register State Context [HSW] »
I thought the context should contain all the register regions in the
list include the dark yellow marked registers as power context
registers, but I saw the content of the context I got began with main
context, LRI signature 110010bf. .. It's weird.
I don't know if the context saved by MI_SET_CONTEXT is just the power
context in B-spec?If yes, why doest it looks like that?
Thanks,
Zhi.
于 07/07/15 20:10, Chris Wilson 写道:
On Tue, Jul 07, 2015 at 04:32:53AM +0800, Zhi Wang wrote:
Thanks for the comments!:) I'm wondering that why the GEN>=5 is
needed here. Is there any HW problems in GEN>=5 when driver wants to
do GPU reset? I'm sorry that I don't know much about GEN<6...Just
want to know more about the story:)
gen5 is about the earliest that I know the hw stated to get smart and
doing automatic power saving by writing to pinned buffers. Before gen5
our reset hasn't been very reliable, and only recently have we had code
that is meant to be able to reset the gpu on those gen - hence my
reservation about doing so unconditionally.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
