On Mon, 2015-06-22 at 17:43 +0200, Daniel Vetter wrote: > On Fri, Jun 19, 2015 at 11:07:29PM +0530, akash.goel@xxxxxxxxx wrote: > > From: Akash Goel <akash.goel@xxxxxxxxx> > > > > Corrected the platform checks in i915_ring_freq_table debugfs function > > so as to allow the read of ring frequency table for BDW and disallow for VLV > > > > v2: Simplified the checks to avoid the double negation (Daniel) > > > > Issue: VIZ-5144 > > Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > > index c49fe2a..438c10b 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -1746,7 +1746,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) > > int ret = 0; > > int gpu_freq, ia_freq; > > > > - if (!(IS_GEN6(dev) || IS_GEN7(dev))) { > > + if (!(IS_GEN6(dev) || (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) || > > + IS_BROADWELL(dev))) { > > Still complicated and also duplicated. What about a HAS_CORE_RING_FREQ() > feature macro, maybe even as a bitmask somewhere? We have them for rps > too, so lots of precendence. > -Daniel Sincere apologies for this blooper. Messed up on my side & sent the old patch only (with the double negation).. Will introduce the new macro, as you suggested. > > > seq_puts(m, "unsupported on this chipset\n"); > > return 0; > > } > > -- > > 1.9.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx