On Fri, Jun 19, 2015 at 11:07:29PM +0530, akash.goel@xxxxxxxxx wrote:
> From: Akash Goel <akash.goel@xxxxxxxxx>
>
> Corrected the platform checks in i915_ring_freq_table debugfs function
> so as to allow the read of ring frequency table for BDW and disallow for VLV
>
> v2: Simplified the checks to avoid the double negation (Daniel)
>
> Issue: VIZ-5144
> Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index c49fe2a..438c10b 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1746,7 +1746,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
> int ret = 0;
> int gpu_freq, ia_freq;
>
> - if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
> + if (!(IS_GEN6(dev) || (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) ||
> + IS_BROADWELL(dev))) {
Still complicated and also duplicated. What about a HAS_CORE_RING_FREQ()
feature macro, maybe even as a bitmask somewhere? We have them for rps
too, so lots of precendence.
-Daniel
> seq_puts(m, "unsupported on this chipset\n");
> return 0;
> }
> --
> 1.9.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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