On Thu, 11 Jun 2015, Damien Lespiau <damien.lespiau@xxxxxxxxx> wrote: > On Wed, Jun 10, 2015 at 09:18:29AM -0700, Matt Roper wrote: >> On Thu, Jun 04, 2015 at 06:01:35PM +0300, Imre Deak wrote: >> > According to bspec the DDI PHY vswing scale value is "don't care" in >> > case the scale enable bit [27] is clear. But this doesn't seem to be >> > correct. The scale value seems to also matter if the scale mode bit >> > [26] is set. So both bit 26 and 27 depend on the value. Setting the >> > scale value to 0 while either bit is set results in a failed modeset on >> > HDMI (sink reports no signal). >> > >> > After reset the scale value is 0x98, but according to the spec we have >> > to program it to 0x9a. So for consistency program it always to 0x9a >> > regardless of the scale enable bit. >> > >> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> >> >> This patch successfully enables HDMI display for my team. >> >> Tested-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > > I believe this should be enough of a good reason for merging at this > stage. > > Acked-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> Pushed to drm-intel-next-queued, thanks for the patch and testing/ack. BR, Jani. > > -- > Damien > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
