On Tue, Sep 09, 2014 at 04:03:15PM +0300, Ville Syrjälä wrote: > On Mon, Sep 08, 2014 at 06:17:18PM +0200, Daniel Vetter wrote: > > Somehow I've overlooked this when simplifying the irq reinit > > scheme on gen4.5+ in > > > > commit 78ad455fd229c6f6cc2f390ccbe0d8f1a62d55a9 > > Author: Daniel Vetter <daniel.vetter@xxxxxxxx> > > Date: Thu May 22 22:18:21 2014 +0200 > > > > drm/i915: Improve irq handling after gpu resets > > > > Since display interrups in general survive a gpu reset on those > > platforms there's also no need to reinit the hotplug settings. > > > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > > This matches my observations on actual hardware. IIRC I looked at the > reset vs. interrupt registers at least on ILK and IVB and the registers > retained their current values on both. > > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
