On Mon, Sep 08, 2014 at 06:17:18PM +0200, Daniel Vetter wrote:
> Somehow I've overlooked this when simplifying the irq reinit
> scheme on gen4.5+ in
>
> commit 78ad455fd229c6f6cc2f390ccbe0d8f1a62d55a9
> Author: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Date: Thu May 22 22:18:21 2014 +0200
>
> drm/i915: Improve irq handling after gpu resets
>
> Since display interrups in general survive a gpu reset on those
> platforms there's also no need to reinit the hotplug settings.
>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
This matches my observations on actual hardware. IIRC I looked at the
reset vs. interrupt registers at least on ILK and IVB and the registers
retained their current values on both.
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 8ff375538b5d..70cc38924040 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -871,8 +871,6 @@ int i915_reset(struct drm_device *dev)
> */
> if (INTEL_INFO(dev)->gen > 5)
> intel_reset_gt_powersave(dev);
> -
> - intel_hpd_init(dev);
> } else {
> mutex_unlock(&dev->struct_mutex);
> }
> --
> 2.0.1
--
Ville Syrjälä
Intel OTC
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