deepak.s@xxxxxxxxxxxxxxx writes:
> From: Deepak S <deepak.s@xxxxxxxxxxxxxxx>
>
> Enabled PM interrupt programming for CHV. Re-using gen8 code and extending same for CHV.
>
> Signed-off-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx>
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 38e6de1..ae6246c 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1403,7 +1403,7 @@ static void gen6_pm_rps_work(struct work_struct *work)
> spin_lock_irq(&dev_priv->irq_lock);
> pm_iir = dev_priv->rps.pm_iir;
> dev_priv->rps.pm_iir = 0;
> - if (IS_BROADWELL(dev_priv->dev))
> + if (IS_BROADWELL(dev_priv->dev) || IS_CHERRYVIEW(dev_priv->dev))
> bdw_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
> else {
> /* Make sure not to corrupt PMIMR state used by ringbuffer */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6abd05b..7da3719 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3398,6 +3398,8 @@ static void cherryview_disable_rps(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> I915_WRITE(GEN6_RC_CONTROL, 0);
> +
> + gen8_disable_rps_interrupts(dev);
> }
>
> static void valleyview_disable_rps(struct drm_device *dev)
> @@ -4115,6 +4117,8 @@ static void cherryview_enable_rps(struct drm_device *dev)
>
> valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);
>
> + gen8_enable_rps_interrupts(dev);
> +
> gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
> }
>
> --
> 1.9.1
>
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