On Wed, Jun 04, 2014 at 11:30:47AM +0530, Arun Murthy wrote: > On Mon, May 26, 2014 at 7:26 PM, Daniel Vetter <daniel@xxxxxxxx> wrote: > > On Thu, May 22, 2014 at 05:48:06PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > >> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >> > >> Because of the upcoming vblank interrupt driven watermark update > >> mechanism we will have use for vblank interrupts during plane > >> enabling/disabling. So don't call drm_vblank_off() until planes > >> are off, and call drm_vblank_on() just before we start to enable > >> the planes. > > Since watermark and display control registers are double buffered > both of them get updated on next blank and hence in sync. > Can you let me know the need for vblank driven watermark updates? Watermark registers aren't double buffered. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
