On Thu, May 22, 2014 at 05:48:06PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Because of the upcoming vblank interrupt driven watermark update > mechanism we will have use for vblank interrupts during plane > enabling/disabling. So don't call drm_vblank_off() until planes > are off, and call drm_vblank_on() just before we start to enable > the planes. > > v2: Pimp commit message (Paulo) > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Merged up to this one until I've stumbled into the first patch lacking an r-b. Can you please update the review board a bit with the current state and maybe repoke reviewers that there's a new series? Thanks, Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 13 ++++--------- > 1 file changed, 4 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 019e9e1..a11bd78 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3885,6 +3885,8 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc) > int pipe = intel_crtc->pipe; > int plane = intel_crtc->plane; > > + drm_vblank_on(dev, pipe); > + > intel_enable_primary_hw_plane(dev_priv, plane, pipe); > intel_enable_planes(crtc); > /* The fixup needs to happen before cursor is enabled */ > @@ -3910,7 +3912,6 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc) > int plane = intel_crtc->plane; > > intel_crtc_wait_for_pending_flips(crtc); > - drm_crtc_vblank_off(crtc); > > if (dev_priv->fbc.plane == plane) > intel_disable_fbc(dev); > @@ -3921,6 +3922,8 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc) > intel_crtc_update_cursor(crtc, false); > intel_disable_planes(crtc); > intel_disable_primary_hw_plane(dev_priv, plane, pipe); > + > + drm_vblank_off(dev, pipe); > } > > static void ironlake_crtc_enable(struct drm_crtc *crtc) > @@ -3999,8 +4002,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > cpt_verify_modeset(dev, intel_crtc->pipe); > > intel_crtc_enable_planes(crtc); > - > - drm_crtc_vblank_on(crtc); > } > > /* IPS only exists on ULT machines and is tied to pipe A. */ > @@ -4114,8 +4115,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) > * to change the workaround. */ > haswell_mode_set_planes_workaround(intel_crtc); > intel_crtc_enable_planes(crtc); > - > - drm_crtc_vblank_on(crtc); > } > > static void ironlake_pfit_disable(struct intel_crtc *crtc) > @@ -4625,8 +4624,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) > > intel_crtc_enable_planes(crtc); > > - drm_crtc_vblank_on(crtc); > - > /* Underruns don't raise interrupts, so check manually. */ > i9xx_check_fifo_underruns(dev); > } > @@ -4719,8 +4716,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) > if (IS_GEN2(dev)) > intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); > > - drm_crtc_vblank_on(crtc); > - > /* Underruns don't raise interrupts, so check manually. */ > i9xx_check_fifo_underruns(dev); > } > -- > 1.8.5.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
