From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Here's a rebased and slightly polished version of the two part watermark update series. Several patches already got merged, so we're down to 16 now. Also the drm vblank series got merged as did the atomic sprite series, so there's nothing else blocking this stuff anymore. Previouse version was here: http://lists.freedesktop.org/archives/intel-gfx/2014-March/041302.html Ville Syrjälä (16): drm/i915: Keep vblank interrupts enabled while enabling/disabling planes drm/i915: Leave interrupts enabled while disabling crtcs during suspend drm/i915: Check hw vs. sw watermark state after programming drm/i915: Refactor ilk_validate_pipe_wm() drm/i915: Refactor ilk_update_wm drm/i915: Add dev_priv->wm.mutex drm/i915: Add vblank based delayed watermark update mechanism drm/i915: Split watermark programming into pre and post steps drm/i915: Actually perform the watermark update in two phases drm/i915: Wait for watermark updates to finish before disabling a pipe drm/i915: Refactor get_other_active_crtc() drm/i915: Disable LP1+ watermarks while changing the number of active pipes drm/i915: Keep track of who disabled LP1+ watermarks drm/i915: Prefer the 5/6 DDB split when primary is disabled drm/i915: Add a workaround for sprite only <-> primary only switching drm/i915: Don't disable LP1+ watermarks for every frame when scaled drivers/gpu/drm/i915/i915_drv.c | 3 +- drivers/gpu/drm/i915/i915_drv.h | 39 +- drivers/gpu/drm/i915/i915_irq.c | 12 +- drivers/gpu/drm/i915/intel_display.c | 152 ++++++-- drivers/gpu/drm/i915/intel_drv.h | 82 +++- drivers/gpu/drm/i915/intel_pm.c | 733 ++++++++++++++++++++++++++++++----- drivers/gpu/drm/i915/intel_sprite.c | 119 ++++-- 7 files changed, 964 insertions(+), 176 deletions(-) -- 1.8.5.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
