On Thu, 2013-12-05 at 15:51 +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > On ILK disabling LP1+ watermarks must be done carefully to avoid > underruns. If we just write 0 to the register in the middle of the scan > cycle we often get an underrun. So instead we have to leave the actual > watermark levels in the register intact, and just toggle the enable bit. > > Presumably the hardware takes a while to get out of low power mode, and > so the watermark level need to stay valid until that time. > > We also have to be careful with the WM1S_LP_EN bit. It seems the > hardware more or less treats it like the actual watermarks numbers, and > so we must not toggle it too soon. Just leave it alone when disabling > the LP1+ watermarks. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 33 ++++++++++++++++++++------------- > 1 file changed, 20 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index db7f3a6..1aa6ea9 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2897,16 +2897,23 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv, > if (!dirty) > return; > > - if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] != 0) > - I915_WRITE(WM3_LP_ILK, 0); > - if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] != 0) > - I915_WRITE(WM2_LP_ILK, 0); > - if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] != 0) > - I915_WRITE(WM1_LP_ILK, 0); > + if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] & WM1_LP_SR_EN) { > + previous->wm_lp[2] &= ~WM1_LP_SR_EN; > + I915_WRITE(WM3_LP_ILK, previous->wm_lp[2]); > + } > + if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] & WM1_LP_SR_EN) { > + previous->wm_lp[1] &= ~WM1_LP_SR_EN; > + I915_WRITE(WM2_LP_ILK, previous->wm_lp[1]); > + } > + if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] & WM1_LP_SR_EN) { > + previous->wm_lp[0] &= ~WM1_LP_SR_EN; > + I915_WRITE(WM1_LP_ILK, previous->wm_lp[0]); > + } > > - if (INTEL_INFO(dev)->gen <= 6 && > - dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != 0) > - I915_WRITE(WM1S_LP_ILK, 0); > + /* > + * Don't touch WM1S_LP_EN here. > + * Doing so could cause underruns. > + */ > > if (dirty & WM_DIRTY_PIPE(PIPE_A)) > I915_WRITE(WM0_PIPEA_ILK, results->wm_pipe[0]); > @@ -2950,7 +2957,7 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv, > } > > if (INTEL_INFO(dev)->gen <= 6) { > - if (dirty & WM_DIRTY_LP(1) && results->wm_lp_spr[0] != 0) > + if (dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != results->wm_lp_spr[0]) > I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]); This and the below "else" version are the same now, so it could be moved before the if. --Imre > } else { > if (dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != results->wm_lp_spr[0]) > @@ -2961,11 +2968,11 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv, > I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]); > } > > - if (dirty & WM_DIRTY_LP(1) && results->wm_lp[0] != 0) > + if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] != results->wm_lp[0]) > I915_WRITE(WM1_LP_ILK, results->wm_lp[0]); > - if (dirty & WM_DIRTY_LP(2) && results->wm_lp[1] != 0) > + if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] != results->wm_lp[1]) > I915_WRITE(WM2_LP_ILK, results->wm_lp[1]); > - if (dirty & WM_DIRTY_LP(3) && results->wm_lp[2] != 0) > + if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] != results->wm_lp[2]) > I915_WRITE(WM3_LP_ILK, results->wm_lp[2]); > > dev_priv->wm.hw = *results; _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx