On 3/10/2025 11:42 PM, Ville Syrjälä wrote:
On Mon, Mar 10, 2025 at 05:46:14PM +0530, Ankit Nautiyal wrote:
Currently VRR timing generator is used only when VRR is enabled by
userspace for sinks that support VRR. From MTL+ gradually move away from
the older timing generator and use VRR timing generator for both variable
and fixed timings.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 76398b3a9679..35f1463583f7 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -556,7 +556,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
if (!HAS_VRR(display))
return false;
- /* #TODO return true for platforms supporting fixed_rr */
+ if (DISPLAY_VER(display) >= 14)
+ return true;
I think we might want this just for ptl for now because otherwise
we lose the LRR fastset.
Or do we know MTL/LNL having actual issues with the legacy timing
generator?
I think there was some kind of claim of issues on PTL, but dunno
if even those were real or imagined?
For MTL/LNL there are no issues, that I know of, with the legacy timing
generator.
As you said, for PTL there were some concerns during debug of some
issues, that were attributed to the fact that legacy timing generator
was still used,
but even those were later root caused to other things as far as I know.
However GOP and other components like DMC fw, pre-si, etc, have
transitioned to VRR Timing Generator as per HW recommendation,
so perhaps we can have this for PTL for now to avoid clash/issues due to
mismatches with these.
We still need to rethink the LRR fastset as you have highlighted. Will
add a note for this in commit message too.
Thanks for the review comments, feedback and the guidance. I will
address the remaining things and send the revised patches.
Regards,
Ankit
+
return false;
}
--
2.45.2
