On Mon, Mar 10, 2025 at 05:46:14PM +0530, Ankit Nautiyal wrote: > Currently VRR timing generator is used only when VRR is enabled by > userspace for sinks that support VRR. From MTL+ gradually move away from > the older timing generator and use VRR timing generator for both variable > and fixed timings. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index 76398b3a9679..35f1463583f7 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -556,7 +556,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display) > if (!HAS_VRR(display)) > return false; > > - /* #TODO return true for platforms supporting fixed_rr */ > + if (DISPLAY_VER(display) >= 14) > + return true; I think we might want this just for ptl for now because otherwise we lose the LRR fastset. Or do we know MTL/LNL having actual issues with the legacy timing generator? I think there was some kind of claim of issues on PTL, but dunno if even those were real or imagined? > + > return false; > } > > -- > 2.45.2 -- Ville Syrjälä Intel
