[PATCH 05/14] drm/i915/dp: Move max DSC BPP reduction one level higher

[Jani Nikula <jani.nikula@xxxxxxxxx>]

Now that {icl,xelpd}_dsc_compute_link_config() take .4 fixed point as
parameter, move the common max DSC BPP reduction one level higher. Use
intel_dp_dsc_bpp_step() to compute the step, and pass on to both
platform specific functions. (Though it's unused for now in
icl_dsc_compute_link_config()).

We can drop the pipe_bpp and connector parameters.

Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 32 +++++++++++--------------
 1 file changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b13d806c9de7..4e7b3dd4067c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2079,14 +2079,10 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
 			    const struct link_config_limits *limits,
 			    int min_bpp_x16,
 			    int max_bpp_x16,
-			    int pipe_bpp,
+			    int bpp_step_x16,
 			    int timeslots)
 {
 	int i, ret;
-	int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp);
-
-	/* Compressed BPP should be less than the Input DSC bpp */
-	max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp - 1));
 
 	for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) {
 		if (valid_dsc_bpp[i] < fxp_q4_to_int(min_bpp_x16) ||
@@ -2116,24 +2112,17 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
  */
 static int
 xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
-			      const struct intel_connector *connector,
 			      struct intel_crtc_state *pipe_config,
 			      const struct link_config_limits *limits,
 			      int min_bpp_x16,
 			      int max_bpp_x16,
-			      int pipe_bpp,
+			      int bpp_step_x16,
 			      int timeslots)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp);
-	int bpp_x16, bpp_step_x16;
+	int bpp_x16;
 	int ret;
 
-	bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
-
-	/* Compressed BPP should be less than the Input DSC bpp */
-	max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16);
-
 	for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) {
 		if (intel_dp->force_dsc_fractional_bpp_en &&
 		    !fxp_q4_to_frac(bpp_x16))
@@ -2165,9 +2154,10 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+	int output_bpp;
 	int dsc_min_bpp;
 	int dsc_max_bpp;
-	int min_bpp_x16, max_bpp_x16;
+	int min_bpp_x16, max_bpp_x16, bpp_step_x16;
 	int dsc_joiner_max_bpp;
 	int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config);
 
@@ -2182,11 +2172,17 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
 	min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp);
 	max_bpp_x16 = fxp_q4_from_int(dsc_max_bpp);
 
+	bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
+
+	/* Compressed BPP should be less than the Input DSC bpp */
+	output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp);
+	max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16);
+
 	if (DISPLAY_VER(display) >= 13)
-		return xelpd_dsc_compute_link_config(intel_dp, connector, pipe_config, limits,
-						     min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots);
+		return xelpd_dsc_compute_link_config(intel_dp, pipe_config, limits,
+						     min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots);
 	return icl_dsc_compute_link_config(intel_dp, pipe_config, limits,
-					   min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots);
+					   min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots);
 }
 
 int intel_dp_dsc_min_src_input_bpc(void)
-- 
2.39.5